INTERRUPT DRIVEN PRINTER FOR GEMINI 2
By Bill Turner
I hear so much these days about the advantages of having a 16 or even 32
bit computer that I start becomming depressed when sitting down to my humble 8
bitter. However, with so much Z80 software I have a made considerable
investment which I can’t throw away lightly. So now the Z80 fights back. I’m
not going to fit a Z80B because I don’t know if the peripherals will support
it and I don’t know how to get the 6 MHz clock rate required.
Instead I am going to use interrupts to handle some of the devices. The
first is going to be the printer which is after all attached to a PIO making
the whole thing pretty simple.
My humble 8 bitter is a Gemini Galaxy 2 running CP/M 2.2 with an Epson
FX80 connected via the PIO using the Centronics protocol. The printer is
reputed to have a 2K internal buffer but this doesn’t seem to make printing a
smooth operation. No hardware changes are required except to the
in 80-BUS News Vol 2 Issue 3. (If the system has an
then no changes are required at all.)
The new printer driving routines are built around a 256 byte buffer which
with single byte pointers provides automatic wrap around making the buffer
appear circular. There is an input pointer which points to the next free entry
for the next character to be printed and an output pointer which points to the
next character to by output to the printer. The buffer is empty when the input
pointer equals the output pointer and it is full when the input pointer is one
behind the output pointer (i.e. the input pointer has gone right round and
caught up with the output pointer). The printer generates an interrupt when
busy goes low provided that interrupts are enabled.
The full listing is somewhere else in the magazine and shows a test
program which illustrates the theory. The routine labels correspond to those
in the Gemini BIOS (section 3.6 of The Galaxy Computer User’s Manual) where
applicable and these routines are intended to replace the existing ones. INIT
has to replace the existing printer initialisation and the interrupt service
routine must also live somewhere in the BIOS.
Where to locate the interrupt vector is a bit of a problem. Wherever it
goes defines the 256 byte page of interrupt vectors and for this reason I have
put it in the BIOS scratch area in page zero but people with 64K RAM boards
used as a RAM disk will find the inter-page transfer code there.
Finally, the biggest problem. Accessing the floppy disk drives is very
time critical and they will lose data if interrupted during data transfers so
it is necessary to find some way of disabling and re-enabling interrupts
around disk accesses. I think that a couple of NOP instructions strategically
placed in the disk driver routines would have been the answer, as they could
be patched to DI and EI if required. This addition would also make it possible
for users to attempt multi-tasking.
The first thing I noticed when the code started to run was that the
was being reset every so often. I found the
in Vol 2 Issue 3 of 80-BUS
News and I am sure no-one will mind if I repeat it here.