INMC 80 News


June/July/August 1980, Issue 1

Page 30 of 48

Hz, and then adjust the bias level to give even mark/space at the lowest possible input level that will achieve stable square waves at IC10. It is also worth reading the article in PCW December 78, which describes the interface in detail.

After making the above twiddles, the interface now runs reliably at 2400 bits/secs., ie 10 times the standard Nascom 1 speed ! I personally have standardised on a speed of 1200, and so far the error rate has been zero. A word of warning, however: you may find that on the highest speeds, the TV display will not scroll fast enough to avoid missing a cassette character. Consequently, if an error does occur during a LOAD, all subsequent lines can be in error.

Connections to Nascom

The documentation recommends various wire links to be made to the serial I/O socket SK2. It makes it easier to retain the ability to use the normal Nascom interface if the UART clock at LINK 4, and the Nascom generated UART input at LINK 3, are also brought out to spare pins on SK2. The normal Nascom configuration can then be re-established, for instance, by wiring a ‘dummy’ plug to fit into SK2. It will still, of course, be necessary to change the actual tape recorder connections back to the Nascom board.


4MHz Without Wait States

After our comment about 8K Basic only running with a wait state, we have had a number of letters from people saying that their Basic runs fine without a wait state. There are two problems, first the ROM is (unbelievably) dynamic. It achieves its refresh from the CE signal. The first time it’s accessed, it’s a bit slow, and sometimes doesn’t quite make it in time for the read cycle, hence a ‘crash’. However, the read cycle refreshed the ROM, so if you are quick about it, reset and restart the system, then the Basic runs perfectly. It won’t forget what it was up to unless you write very long ‘USR’ routines which leave the Basic ROM alone for some time. The book says 2mS, but we’ve found that a typical Basic ROM won’t forget until about 15 seconds have elapsed.

The second problem is the RAM (A) board not being up to 4MHz because of timing problems with the CAS and RAS signals. If you would like your system to run at 4MHz without wait states the fixes given on pages 22 and 23 of issue 7 of the INMC News may be necessary, In Particular item 3 at the top of page 23.

This is an OCR’d version of the scanned page and likely contains recognition errors.

Page 30 of 48