INMC News

  

February/March 1980, Issue 6











Page 20 of 38











routine ends by enabling the CPU interrupts again and then immediately returns with a RETI, which re-enables the PIO interrupts.

You may have wondered when the READY line goes low. In both modes the READY line goes low when an interrupt is generated. This may be used by the external device to acknowledge that an interrupt has been received. It could be used to inhibit further interrupts from the external device, particularly where a number of PIO’s are ‘daisy chained’ together, and higher priority interrupts are already being processed, hence there will be a delay before the external device is processed. In other words, it says to the external device “OK, seen you, you are in the queue, don’t bother me again until I go high.”. It has no internal affect on the PIO, save to get it ready to go high again when processing of the interrupt is complete.

Example of handshaking sequence

For two PIO’s to handshake, the STROBE (input) line of each is connected to the READY (output) line of the other. This diagram shows a typical sequence of events, starting with a dummy read from. the input port to start the process.

Output port

Input port

IN issued once after PIO initialized. READY goes high.
CPU interrupts enabled with El.
The incoming STROBE goes high, So there is an interrupt.
READY goes low.
Interrupt routine issues an OUT, and the READY goes high.
Interrupt routine ends with EI, RETI, so it is ready for the next interrupt.
Incoming STROBE goes high, so there is an interrupt.
READY goes low.
Interrupt routine issues an IN, and the READY goes high.
Interrupt routine ends with EI, RETI, so it is ready for the next interrupt.
The incoming STROBE goes high, So there is an interrupt,
READY goes low.
Interrupt routine issues an OUT and the READY goes high
And so on..... And so on.....

You could try this with just one PIO, by making the two ports of your PIO talk to each other.


This is an OCR’d version of the scanned page and likely contains recognition errors.











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