80-Bus News

  

September-October 1983, Volume 2, Issue 5











Page 26 of 67











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26

If we now turn to the N2 memory decoding you will see a. simplified version in Fig 1. As you can see, the address decoder IC46 is only enabled by the decode PROM when /MREQ goes low. This is fine for the 2708s, as their /CS access time is 120ns, but is not suitable for connection to the /CE pin of the 2716 or 2732. The answer is to change the circuit configuration slightly as shown in Fig 2. Here the /CS decoding of IC46 is no longer qualified by /MREQ, and so as soon as an address appears on the address bus it is decoded to a /CE line in order to start the data access on that particuler EPROM. (Remember – this has to be done at least 450ns before we want the data). Subsequently, if and when /MREQ goes low, the high order address bits are decoded in the PROM (1C47). If it is a valid access to the EPROMs, then the Output Enable pin of all the EPROMs will be taken low, and the one that has been selected by its /CE line will output its data onto the Bus. (In this case. the /OE signal has to appear at least 120ns before the data is required). If it is not an EPROM access, then the outputs are not enabled, and the only penalty paid is that one EPROM has been powered up but not used.

How to do it.

The following description will assume the modification is being performed on a standard N2 to which no exotic modifications have been made. Where the word TEST appears, it indicates that you should put the N2 back in its frame, power up, and check that Nas-Sys and Basic still run. If they don’t, the reason for it should be easily identifiable. For the wiring on the bottom of the board I used a Vero wiring pen with the polyeurathane covered solderable enamel copper wire. Its easy to use, and makes a neat job of the modification.

Start by removing the N2 from its card frame and placing it in front of you. Remove any EPROMs already fitted in IC sockets 35-42. Remove any associated links from LKS1. (This should just have the standard 3, 1-16 2- 15 8-9). Remove all links from the strapping fields LKBi-LKB8. TEST. Put the card component side down with the EPROM sockets along the bottom. Ignoring the workspace RAM at the right hand end, wire together all pin 19s of the byte-wide sockets including the Monitor and the Basic ROM. (This connects in A10.) See Fig. TEST. Next wire together all pin 20s, this time only do the 8 empty sockets, DO NOT INCLUDE THE MONITOR OR BASIC. TEST. Next wire together all pin 218, once again only do the 8 empty sockets, DO NOT INCLUDE THE MONITOR OR BASIC. TEST. Turn the card over. On the eight link blocks link pin 4 to pin 8. (Connects /CS from decoder to /CE) – see Fig. TEST. Remove IC46 (LS155 decoder) from its socket and gently bend up pins 3 and 13. Solder two lengths of thin insulated wire to these pins.


This is an OCR’d version of the scanned page and likely contains recognition errors.











Page 26 of 67