Micro­power

  

Volume 1, Number 1 – August 1981

Page 22 of 33

suitable time – in order to complete the access by the end of the 500 nanosecond processor time slot.

Two other signals are generated. One (RVSEL) is intended to gate the address and data steering logic and permit a “read-enable” to reach the RAM. The other (WVSEL) is a signal timed to be contained within this, used to permit a “write enable” to reach the RAM, with satisfactory data set up and hold timing. A small capacitor can be fitted to lengthen this signal slightly – this is only needed for slow RAMs and is included because some of the early Nascom 1’s might then be able to use this approach.

On the implementation given, these signals are generated twice, for two different address fields. One is the V.D.U. RAM, but some readers will be interested in the possible application of the other. The club mentioned earlier has become dissatisfied with the limited character set imposed by ROM-based graphics, so a programmable character generator is being included as part of a P.C.B. we are developing (The resulting board will be 8″x8″, Nasbus compatible, and also contain 64K of RAM and a few other bells and whistles, for those interested). Now the immediate use of programmable graphics is to download special characters chessmen is a good example – from tape along with the software that uses them. After that, however, is the rather more fascinating possibility of using this programmability dynamically to produce smooth movement: watch your Klingons grow in size in your starship viewscreen as they sweep in to the attack.

Our P.C.B. uses separately addressed RAM, which is expected to be regularly accessed by both the video display logic and the processor, so the same conditions exist as for the V.D.U. RAM. Not surprisingly, the same solution to on-screen disturbances also applies; hence the second pair of signals. Since they require no additional I.C.s for their generation, I have included them in the diagram.

The instructions constitute a modification for Nascom 1, for which I won’t apologise: there are a lot of you, and also you have lived with the problem longer! Nascom 2 owners should have little difficulty in working out their own version, but if there is sufficient demand then another article is always possible. To assist with installation a sketch is included of the veroboard layout as fitted to my own machine. It will be noticed that the connections to IC31 are made by adding “extension legs” from the pins of the 7406 down through the veroboard. This makes for space saving, wiring minimisation, and a certain amount of mechanical support all in one, so is to be recommended. These extension legs were taken from a broken DIL headers I suggest that you experiment and search your Junk box.

INSTALLATION

In the instructions which follows “Lift IC xx pin y” means: carefully remove IC xx from its socket, with a pair of thin, flat-nosed pliers bend pin y horizontal so that it no longer makes contact with the socket, and replace. “Connect pin of IC xx/y to …” means: solder one end wire directly to the pin bent horizontal in a “Lift” instruction.


Page 22 of 33