Scor­pio News


October–December 1987 – Volume 1. Issue 4.

Page 8 of 55

  • MULTIPLY and DIVIDE instructions are included, for both signed and un-signed bytes & words.
  • 16-BIT INDEXED where an instruction such as (IX + d) has d as 16 bits, in addition to the 8-bit usual Z80 instructions. This instruction works with the HL, IX and IY registers and is useful for indexing larger (over 256byte) arrays of data. Indexing on HL is new.
  • PROGRAM COUNTER RELATIVE addressing for example,
            Ld A,[PC + d]     where d is 8 or 16 bits.
  • STACK POINTER RELATIVE addressing is useful where the stack contains a data array of known format, passing parameters on stack, etc. Previously to access a position on the stack, the SP had to be added to, or subtracted to point to a byte, modified, then the reverse operation to the stack was required. The same operation now takes one instruction to load or save to somewhere in the stack. (8 or 16 bit displacements). The addressing mode alone will dramatically speed-up any (Z280 specific) compiler, where the method of parameter passing is usually on the stack.
  • BASE INDEX addressing allows the effective address of the operand to be computed by adding the contents of any 2 of the HL, IX or IY registers. For example Ld A,[HL+IX].
  • EXCHANGE H with L. The contents of the H and L can be exchanged with one instruction (EX H,L) Possible include correcting the significance of the MS & LS bytes of a word. Without this added instructions, three instructions are required and a third register.
  • WORD COMPARE instructions e.g. CP [HL],BC simplifies this operation from 5 instructions to one.
  • EXTEND SIGN extents the sign of a byte into another register, correctly converts a signed byte to signed word.
  • SYSTEM CALL NN instructions. The CPU jumps straight tu the address found at the contents of the “Interrupt/​Trap vector Table pointer” + 50H, the call number (NN) is left on the stack. Returns to the user programs via the new “RETIL” (return from Interrupt long) instruction. This is similar to the software interrupt on 8088 based machines. It enables an operating system to have a standard set of calls for all Op. System fractions.
  • WORD I/O allows IN[W] HL,(C) and OUT[W] (C),HL to ipput/​output 2 consecutive bytes to/from the HL register. Also INDW & INIW, input word to (HL) and decrement (or increment) HL twice.
  • INDRW, INIRW, OUTDRW & OUTIRW input/​output word to/from (HL), HL +/–2, B-1, until B = 0.
  • TEST I/O DATA   TSTI allows an input port to be tested, without actually inputting data. This is very convenient, and fast, for say “Test keypress” type instructions, where the input data can be (non destructively) tested. With the Z80, we had to do a real input of the data, then store it somewhere.

There are other commands for “Extended Architecture” which apparently extend the CPU instruction set, but I have not looked into these yet.


The Z280 supports 16MByte of memory. This is fully usable for new programs because of the memory management unit (MMU). The MMU uses 12 bits to map each 4K within the 16MBytes addressing rage.

The MMU translated “logical” addresses to physical. A concept used in all the modern, advanced operating systems.

On startup the MMU passes logical addresses to physical addresses without translation. The boot EPROM is at physical location 000000 onwards. On boot-up it maps DRAM into the bottom 256KBytes, allowing all standard CP/M programs to execute immediately.

Being of 4K block size, it is conceivable that it could “emulate” the existing Gemini page mode structure, if required.

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