80-Bus News

  

July-October 1982, Volume 1, Issue 3











Page 22 of 51











22

Refer to the link block diagram in your manual (you have got a manual, haven’t you?) and on each link block, LKB1-8, connect pin 8 to pin 4 (chip select) – pin 6 to pin 2 (output enable to read enable) – pin 5 to pin 1 (write enable). Finally loop pin 7 (address line A10) along to the next pin 7 on the next link block, and so on, so that all eight pin 7’s are connected together, and pick up address line A13 off the bus – best done on pin 12 of IC47 (N2MD). This has the affect of addressing through all the lower 1K’s of each chip and then through the upper 1K’s (the upper and lower halves of each chip are then separated by 8K, not a very clever idea for EPROM, but as it’s RAM it doesn’t matter), it’s the simplest method. Finally, to make the whole thing go, connect the RAM-GATES on the ‘MD’ link plug to the addresses required, for instance D000 to F000 would give memory starting at D000 and finishing at FFFF. If-you are using a CP/M type system, then set the memory card to go from 0000 to B000, giving memory from 0000 to BFFF, and strap the block addresses C000 + D000 + E/F000 together, to RG1 or RG2. This gives 64K from one end to the other.

To provide RAMDIS on to th peb requires two ICs, one 74LS832 and one 74LS04. These devices will be used to provide the write disable control as well (so you might as well go the whole hog). In my system these two chips were piggy backed on to two other conveniently placed 14 pin chips close to Link Block LKS1, to which most of the connections will be made. Remove IC18 and bend out pin 13 then replace the IC. For the remainder of the connections refer to circuit diagram 1 along side the sheet 3 of the Nascom 2 circuit diagram. Look around the top left hand corner, that’s where most of the circuitry will be found. I suggest that you now carefully test your Nascom with and without external peripherals either addressed, or not addressed to the same area as the new RAM. Make sure there is no interaction between the new RAM and the existing RAM, any faults should be found and corrected. My system has been operating now for many months and there have been no problems.

Now for the tricky bit, the battery backup connection, it’s not difficult, just time consuming, and some care is necessary to ensure that the right connections have been made. The idea is to isolate all of the +5V connections to pin 24 of each chip and also to pin three of the associated link blocks. This can be done by cutting about five tracks and adding a few wire links. I would have included complete details, but it’s very difficult to get at the underside of my N2 card now to see exactly what I did. Check that you still have +5V on your monitor and Basic ROMs, and any other RAM/ROMs in the vicinity. I didn’t when I did it. Next, replace IC46 with a 74LS156 (the 7418156 is an open collector version of the 7415155 already fitted) as this is necessary to allow correct power down. Fit 8 off 1K resistors between pins 3 and 4 of each link block LKB1-8 these provide power to the device selects in the standby mode and should be connected to the new +5V backup supply when the battery is fitted.

Now for the battery backup, best to refer to diagram 2. The best place for the battery is by the ‘power test points’ adjacent to the Basic ROM. The test points provide a convenient point for connection to the battery (via the diode and resistor) and is conveniently close to the now separate RAM supply and device select rails. The 18OR resistor in series with the battery is the charge limiting resistor and is chosen to fully charge the batteries on about four hours use a week. If the Nascom is used for a lesser amount of time over a weekly period, then the value of the resistor may be reduced. Note the value of the resistor must not be made less than 100R. Ensure that the battery is connected to the power supply and device selects ONLY. Any wrong connections and the battery will get quite hot and be flat in minutes.

It’s worth considering connecting the monitor into the memory backup with another HM6116, with it’s own write protect switch, as this allows the monitor to be changed at will yet still be there on power up. Further, if the Bits & Pcs programmable character generator is fitted, both 4116’s can be replaced with a single HM6116 or even two HM6116’s and the character generators made fully programmable as well.

The write protect switching is recommended as there is no protection against spurious ‘writes’ during power up or power down. However, to date I have not experienced any problems in this respect and have tried to provoke spurious errors without ‘success’. Anyway, to be safe, always disable the write during power up/power down.

Having had this facility fitted for some while I wonder how I ever got on without it before it was fitted. The time spent fitting it and getting it right was well worth the effort.


This is an OCR’d version of the scanned page and likely contains recognition errors.











Page 22 of 51