80-Bus News

  

July-August 1984, Volume 3, Issue 4











Page 17 of 43











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is the only authorised method of implementing GM862/802 RAM on this system. Explicit examples are shown in the GM862 Manual of how to select each 64K page via switch ICl, disable Extended addressing and enable Page mode via poles 4 & 5 of switch IC2, and disable the 4K/8K “Common Area’ via poles 2 & 3 so that an entire 64K memory bank is switched each time a different page is accessed. As existing software for Nascom/Gemini Page Mode operation already provides simultaneous Read/Write to the top of each memory bank or page, a hardwired Common Area is NOT required to run CP/M 2 etc. on the GM862. Future developments like CP/M PLUS may need this facility however, and dedicated experimenters could find it interesting.

A HARDWARE FIX

; When the GM862’s DIL switches were carefully set up as per the manual to provide 4 pages of 64K, the Nascom refused to work under CP/M and other DOSs, or even good old Nas-Sys. It would run all systems as usual with the old 802 board without page mode selected, but would not boot CP/M when this board was set to read and write as page zero. Under Nas-Sys it seemed that none of the new board’s RAM was being addressed, while the old 64K board could be addressed when setup as any of the four pages. I suspected that the GM862 was not responding to the 80BUS /RAMDIS signal but without a circuit diagram was disinclined to poke about with over £300 worth of brand new hardware. Nevertheless I could have kicked myself when our esteemed Editor told me brightly some days later that a pull-up resistor was needed on (you’ve guessed it) the /RAMDIS line when using the 256K board with a Nascom. All Gemini CPU boards have pull-ups, on some (open collector) bus lines, which the original Nas-Bus specification expects to find on the auxilliary board/s. Note also that /NASIO, /NASMEM and DBDR signals are not provided on the GM862. Gemini have provided the mounting holes and pads for the necessary 4k7 (4.7k ohm) resistor quite close to the /RAMDIS edge connector (pin No.9) and the +5V termination pad of electrolytic capacitor C6, but for some strange reason have not laid tracks between the resistor pads and these points. Only short links are needed however, and the layout allows the resistor to be inserted and its leads bent and soldered neatly to the capacitor pad and edge pin track.

MODIFYING SIMON With the resistor fitted, each 64K page of the 256K RAM could be accessed -via Nas-Sys and, with page 0 selected, would support programs and DOSs running under Nas-Sys. CP/M still refused to boot-up however, and the clue to the solution of that problem is to be found in the manual under Note 1 of Section 4 – SOFTWARE IMPLICATIONS. This states that the GM862 Page-Mode latch is cleared on RESET, disabling its memory until any given page is selected by writing to Port OFFh. The standard Gemini CP/M auto-boot EPROMS and versions 2.0 or later of RP/M for the GM811 and GM813 CPU boards, include initialisation code to select Page 0 on start-up or RESET. Earlier software and firmware for the Nascom has no such code and so it must be modified. The routine is simple and fortunately there is ample space within SIMON to accomodate it. My method was to change the first jump table instruction at the begining of SIMON to go to the Page 0 selection routine, and when this is completed a jump is made back to the original target address. The A register and Flags are saved and recovered to allow the routine to be portable i.e. to be used in other locations or boot systems. The assembled patch listing for SIMON 1 located at F000h is shown below and can be easily be adapted as required:–


This is an OCR’d version of the scanned page and likely contains recognition errors.











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