Scor­pio News

  

April–June 1987, Volume 1, Issue 2











Page 46 of 51











GM809 Fast Stepper by R. Mohamed

This article describes a simple hardware Floppy disk controller board to allow full. driver.

About two years ago T upgraded my Nescom 2 by replacing the exteting drives with Peouple of TEAC FD-Sseet they provided ay vystwa with a very worthwhile bee in peftormance and disk capacity (From Unfortuaately hey sound Llxe’s couple of machine guns every time the disk heads moved. Altering the stepping rete from 20 to 6 asec (#till twice the minimum for the TEAGS) reduced the noise to’s slightly Leve objectionable bucrrr.

DESCRIPTION

‘At about thie time, I learned that the never GM829 FDC board could support the faster 3 mec stepping rate of modern floppy disk drives by doubling the clock frequency into the FOE controller chip The GH829 board controle the FDC clock frequency, amongst other things, by using the upper most bit (bit s) of a six bit resetting latch Examining the M809 circuit diagram revealed that this je bit ie present and uncommitted on the board. LK 1 on the GMOS provides a ction of 3 clock frequencies, one of which ie selected by 4 soldered Link jd te to add a eimple (digital) 2 way avitch in place of

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Ligure 4 741800 digital switch

The simple circuit in figure 1 can switch through one of 2 clocks under control of a single input lines The tvo clock frequencies (1 2 Mz) are each Connected to one input of & pair of HAND ‘which are functioning as digital Switches. “The other input to the gates afe connected to the clock select Lin Logic 0 (low) on the clock select fine opene the evitch and logic 1 (high) will close the awiteh Letting the clock pulser through to the output of the relevant te. An inverter on the select Line (made from another NAND gate) ensures that only one switch is open and the other closed at all times A fourth NAND gate combines the outputs from the two digital ewitches nto a tingle oueput ting the software selected clock frequency” Af ald atx bite Tate (IC3) are set to logic 0 (low). By sui clocks, the standard iMiiz clock is selected on rY Teave sll well behaved disk routines unaffected by the modification.


This is an OCR’d version of the scanned page and likely contains recognition errors.











Page 46 of 51