80-Bus News


May–June 1984 · Volume 3 · Issue 3

Page 19 of 51

after which it is reset for the next line. If it is still working through one of the 25 ‘character’ lines on the screen then it is reset to N and the character generator ‘line’ address is incremented by one, otherwise it is reset to N+80 to select the next line of characters. When the display line starts the controller turns ON the ‘display enable’ signal. This is turned OFF after address N+79 is passed. Then, as further pre-programmed character positions are passed, the controller generates the Horizontal Sync pulse, and finally the internal reset signal for the counter.

From the information we have given it the controller thinks it is displaying characters N to N+79, but by playing around with the external delays we actual display N+1 to N+80, and in the process gain sufficient advance warning of an active display line to prevent any unseemly clash between the Z80 and the display controller. As the controller has been fooled over the start of the display, it also has to be mis-informed about the cursor position, a task that the NMI routine carries out as it updates the internal registers of the controller.


With the display contention problem solved by hardware, various other changes could be made. One was the use of the interrupt system. Previously, with the transparent screen access being determined by software loops, interrupts could not be used as they could interfere with critical parts of the loop. With the SVC, keyboard input is now done under interrupt. Also, while the SVC-MON is scrolling the screen (with an LDIR instruction), it enables an interrupt routine to collect and buffer incoming characters from the Host. Normally the SVC-MON polls for input characters.


An option for a serial keyboard has been included in the SVC. This is an either/or option with the parallel keyboard, not an AND one, as they both share the same IO port (on the SVC) and some of the interface circuitry. The serial keyboard requires fewer wires to interface it, and this leads to lower cost. (See the latest Gemini price list – The multi-core ‘curly-wurly’ cables for the parallel keyboard cost a fair bit! The difference in price solely reflects the cabling costs. There is no difference in keyboard costs as the change required on it was only a small one in the on-board software. (The keyboards use an 8035 single-chip microprocessor to scan the key matrix and generate the appropriate ASCII codes.)


As with the IVC, on the SVC the vertical sync output of the display controller is connected to the NMI input of the on-board Z80. However the SVC NMI service routine performs different functions. It no longer scans the keyboard as that has been transfered to a conventional interrupt routine (see above). It handles the timing of various attributes. The tone generator for the on-board bleeper is directly enabled and disabled by the SVC monitor and thus the duration (but not the frequency) of the ‘bleep’ is fixed at an integral number of NMIs. Similarly the low frequency waveform used to ‘blink’ characters is also generated by this software. One other feature, mentioned by Dave Hunt in the last issue, is the implementation of a software ‘clock’.

One point to bear in mind when you start thinking ‘wouldn’t be nice If..’ is the fact that the NMI routine is executed once every 20mS. The larger and more cumbersome it becomes, the more it is likely to have an impact on the

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