INMC 80 News

  

February-April 1981, Issue 3











Page 28 of 55











some of

-28-

the possible variations are mentioned in the text. However, the system

described works and offers the following features.

1)

2) 3) Certain

1)

2)

Support of NAS-SYS, with RAM available up to DFFFH (Basic ROM selected), or RAM up to EFFFH (D-DOS selected).

Support of CP/M, with RAM available to EFFFH.

All NAS-SYS software (except ROM Basic) has been placed on disk.

points should be made here:

Standard (ROM) D-DOS runs from B000H to B7FFH, which would conflict with RAM as mapped above.

ROM ZEAP will not (unless somehow modified), run in RAM, and is sited at D000H to DFFFH. There would again be some conflict with RAM.

In either case the ROM’s would work, but would limit the effective system RAM size.

Possible solutions

ZEAP

D-DOs

1) Use a tape version of ZEAP (1000H to 2000H). This would allow up to 52K of RAM to remain free.

2) Find out how to modify ROM ZEAP so that a RAM copy of it will run. This allows 48K of free RAM.

3) Switch off the ROM “Block Select’ signal out of the MD PROM or memory board decoder when ZEAP is not in use. (48K with ZEAP selected, 60K max. without ZEAP.)

1) Use the tape version of D-DOS. This is rather unattractive as it means a tape has to be loaded each one wishes to use disk.

2) Disable the D-DOS ROM’s by switching the “Block Select’ signal off when ROM’s are not in use. This is a better solution, but it means in some cases that extra ROM sockets are needed, which are not available, or else that two out of four ROM sockets may not be used.

3) Change D-DOS to run at F800H – FFFFH. (Or try to persuade your Nascom dealer to supply D-DOS to run at this location.) I altered D-DOS without too much difficulty by altering all the jumps etc from BXXXH to FXXXH (where the XXX also changes in the second most significant digit).

Important Construction Notes

1)

2)

Circuit

The Nascom 2 manual makes reference to Block A and Block B on the main board. These locations change depending on several variables, and in order to avoid confusion, where BLKA or BLKB are refered to in the following description, then BLKA = Pin 6 of LKS1, BLKB = Pin 4 of LKS1.

The relevant IC’s to be inserted are located by the IC socket numbers and not by the references Al – 4, B5 – 8 marked on the peb.

The switches $1 and $2 should be mounted as near as possible to LKS1 to reduce the chance of noise pick-up, and to reduce delays.

operation and positioning of IC’s

1) 2) 3)

4)

5)

All standard Nascom 2 I1C’s in normal socket positions.

CP/M ROM’s 1 and 2 in IC sockets IC39 and IC40.

D-DOS ROM’s in either separate 4K block on external RAM (A) board or EPROM board, or (if suitably reprogrammed) in IC sockets 1C41 and 1C42.

If available, 4 x 4118 RAMs in IC sockets IC35, 1036, 1037 and IC38. If not, it will be necessary to use a 4K block of RAM on a separate RAM (A) board. If 4118s are not used, it may be possible to site the D-DOS ROM’s for area BOQOH to B7FFH in this location, and to loop a “B’ decode from an external RAM board, but this has not been tried. (B000H to BFFFH is not decoded by the new N2/MD/CPM PROM.)

If available, a 4K block of RAM may be wired to decode EQOOH to EFFFH. (When the Basic ROM is selected on $2, it will disable the RAM and work correctly.


This is an OCR’d version of the scanned page and likely contains recognition errors.











Page 28 of 55