Scor­pio News


April–June 1987 – Volume 1. Issue 2.

Page 37 of 51

MAP RAM Green (really red) Light

by R. Mohamed

Have you ever wondered if your system had died during, say, a long compilation on your RAM-disk? I did, many times, shortly after configuring my MAP RAM card as 64k of memory and a 192K RAM-disk.

Mechanical disk drives can easily be seen to be active (audibly and/or visually), RAM-disks are by contrast totally silent and in my case there is also no apparent evidence of its being accessed. Very disconcerting! However inspection of the MAP RAM card’s circuit diagram revealed on unexpectedly simple solution.


When the RAM card is used in the 32/64K page mode, a 8 bit latch (IC46 which is addressed via port 0FFH) forms an extended address which is subsequently used to select one bank of 64K of RAM from another. Additional logic allows the software to effectively select either the upper or lower 32K of memory (when in 32K page mode) from any bank of 64K. Three bits from the latch are further decoded on each card by IC47 (LS138), a 3 to 8 line decoder. The decoder converts an input binary number, in the range 0 to 7 (hence 3 bits) into a low voltage at the correspondingly numbered output (or select line). The 8 outputs of the decoder are used to select a particular row or bank of 64K of RAM situated on the card.

Because there are only four banks of 64K on each card, only four of the outputs of the decoder are actually used. The decoders, one on each card, are enabled (or selected) in pairs. Each pair of decoders can select up to 8 banks of RAM, spread over the two boards. Each card in a pair will usually use either the upper or lower four decoder select lines. For example, card number 1’s decoder is wired to be selected when RAM banks 0 to 7 are permissible, and similarly for card number 2. But in card number 1’s case, outputs 0 to 3 of the decoder are wired to the four banks of RAN located on the card. For card number 2, its 4 to 7 decoder outputs that are wired to the four banks of RAM on the card. Thus, if the software wishes to access bank 1 then the second row on card number 1 will deselected. If bank 6 is to be accessed then the third row on card number 2 will be selected.

After a reset, or when power is applied to the system, all the bits of IC46 are reset to zero. Bit 7 of IC46 selects operation in 64K page mode and as the 3 address bits into the decoder are also zero, bank 0 is selected (on card number 1). This bank of RAM now forms the main addressable memory for the Z80 microprocessor. Whenever another bank is selected, say in 32K page mode, and accessed (either upper or lower 32K) then Line 0 of the decoder on card 1 will go high, deselecting bank 0, and one of the other outputs of that or possibly any other decoder will go low to select the wanted bank of RAM. When the latch is reset to all zeros, output 0 oF the decoder goes low, selecting bank 0 once more

It is easy to see that select line 0 on the decoder on card 1 can be used to give an indication of whether bank 0, the main Z80 RAM, is being accessed by the CPU. If the select lane is low then bank 0 is selected and the CPU is accessing its main memory. Conversely, when the select line is high the CPU is accessing another bank of RAM. So all that is needed is a simple indicator to reflect the status of select line 0.

One could attach the indicator, a LED, directly to select line 0 but this approach has two disadvantages. Firstly, the ‘sense’ of the indicator will be wrong, i.e. the LED will be lit when bank 0 is being accessed and off otherwise. Secondly, the LED will add an extra load onto the select line and possibly degrade its performance.

Conveniently, there is a spare inverter on card number 1 which has its output and input pins wired to pine 14 and 8 (resp.) on LB1. Its use will both correct the ‘sense’ of the indicator and provide a buffer to select line 0. The

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