80-Bus News


January–March 1982, Volume 1, Issue 1

Page 19 of 55


A further point to note is that the clock’s interrupt system is not reset on a computer reset. This will cause problems if an attempt is made to run another interrupt-using

program which does not expect clock interrupts, unless the clock’s interrupt system is first reset by software. This can be done by outputting zero to the interrupt register and then reading the register.

Demonstration program

The listing of a demonstration program TIMEDATE 1 is given below. This is written for use with NAS-SYS and is entered at 1000H, The program then requests that the starting time (hh mm) and date (dd mm yy) be keyed in – e.g.!

23 59 31182

The clock will be started from this time when ENTER is hit. If the line entered starts with a space (e.g. if no time is provided}, the existing clock time will be retained,

TIMEDATE 1 then returns to NAS-SYS, from which a user program can be entered if required. However, NAS-SYS or the user program will be interrupted at intervals of 514.4 ms while the interrupt routine updates a time and date display on the top line of the screen,

Note that a separate stack is used by the interrupt program, because the interrupted program (such as NAS-SYS) may not have enough spare stack space for the interrupt routine. The interrupt pointer address defined by the contents of the I register and the vector (OOH) returned by the clock is loaded with the start address of the interrupt routine,

Components List for real-time clock and calender

Resistors? Integrated circuits! R1il=220R TCL]=MMS8174N R2=4,7K TCZ=7 4 Soa R3,R4,R5=10K TCS=7 4. sod R&e=“1E Dt4=74.500 RR? ,RG=10K TCS=74. $27

IC4&, 20% =74Ls05 Capacitors? TC8=74L S145 Ci,C02<10nF C3<10ur 14ey Transistors anc diodes? C426-34pF TrisBCi?7e

Tr2Z=BC1LO8 ZOA8B2ZX03C0 8ya

Miscellaneous? XTAL= 32.768 KHz crystal Batt.= 2 A&® NiCad cells in series

This is an OCR’d version of the scanned page and likely contains recognition errors.

Page 19 of 55